Rapid Automatic Cascode Exchange
A new class of pulse generator microwave pulse generation microwave pulse generation architecture, the RACE (Rapid Automatic Cascode Exchange) pulse generation circuit,[1] is implemented using low-cost monolithic IC technology and can produce pulses as short as 1 picosecond, and with repetition rates exceeding 30 billion pulses per second. These pulsers are typically used in military communications applications, and low-power microwave transceiver ICs. Such pulsers, if driven by a continuous frequency clock, will act as microwave comb generators, having output frequency components at integer multiples of the pulse repetition rate, and extending to well over 100 gigahertz.[2]
Details
A method and apparatus for generating ultra-fast (picosecond-range) electrical sampling apertures and pulses, requiring only a single transition of a control signal. Implemented in a novel circuit architecture that is suited to fabrication as a low-cost monolithic integrated circuit, the method produces more stable, more reproducible, and more precisely shaped sampling apertures and pulses, with lower power usage and cost, than conventional techniques. The combination of speed and reproducibility allows the integration of large numbers of virtually identical fast sampling apertures or pulse generators on a single IC, enabling single-shot capture of such a rapid sequence of samples that even a single cycle of a very fast, microwave frequency, electronic waveform may be precisely sampled at multiple points.
The RACE uses novel methods, circuits and systems to achieve superior sampling and pulse generation capability at reduced cost. Furthermore, the RACE allows the fabrication of larger and more tightly matched groups of sampling apertures or pulse generators.
The sampler/pulser circuit has three distinct operational states determined by the voltage level of the control signal, Control. The circuit transitions sequentially through all three states as the voltage level of the control signal, Control, falls from an initial voltage that is greater than the fixed input voltage V3, to the second state in which Control is between the voltage of the fixed input voltage V3 and the fixed voltage V2, to the third state in which Control's voltage is less than fixed voltage V2. Typically V2 can be approximately between one and two volts higher than voltage V1, and V3 can be approximately between one and two volts higher than V2. The control signal, Control, typically begins at a voltage level that is approximately the voltage level of Vdd, the power supply. The voltage level of Vdd is typically one to three volts higher than V3. At the time one desires to create a sampling aperture or pulse, the control signal is slewed in a negative direction, so that it ultimately ends up at a voltage that is less than V2. If the control signal is initially greater than V3 by more than a few tenths of a volt, transistor Q9 and Q10 are "on" (biased into the forward conduction region) and transistors Q7 and Q8 are "off" (biased so that essentially no current flows), resulting in the output nodes being pulled up to Vdd, causing the sampling gate to be turned "off" (the output nodes contain no signal). Similarly, if the level of the control signal at the end of its falling transition is less than V2 by a few tenths of a volt, transistors Q11 and Q12 are "on" and transistors Q5 and Q6 are "off", resulting in the output nodes being pulled up to Vdd, and the sampling gate again being turned off. However, during the active falling of the control signal, when the control signal is between V2 and V3, transistors Q5, Q6, Q7, and Q8 are all "on" (and Q9, Q10, Q11, and Q12 all "off") resulting in the sampling gate being turned on. In this case, the differential input signal across the input terminals IN+ and IN− is multiplied by the circuit gain to generate a differential output signal across OUT+ and OUT− terminals.
Thus, as the control signal Control traverses the range defined by V3 and V2, this off-on-off sequence results in a sampling aperture being created in which the input is coupled to the output for a brief, and highly controllable period of time. At all other times the output is isolated from the input. In the event that the RACE is to be used as a sampler (and not a pulser) the output value is desired to be held even after the sampling aperture is closed, and an optional capacitor CHOLD is connected between the two output terminals, as shown in FIG. 1. The circuit generates an aperture/pulse regardless of direction of the transition of the trigger signal (low-to-high, or high-to-low). If, on the other hand, an aperture or pulse is only desired during one transition, then the current source, I, may be turned off, using conventional circuitry, during the time the transition occurs in which we do not desire to generate an aperture or pulse. For example, if an aperture is desired only during the rising edge of Control, the current source I would be turned off after the rising edge is over, and turned on again shortly before the next rising edge of Control. This will avoid any current being channeled to the output terminals during the falling transition of Control.
In the RACE, the aperture/pulse duration is determined by the level of the control signal, allowing for a variable duration aperture or pulse via manipulation of the control signal rather than any circuit change (e.g. the need for addition of a low-pass filter at the output) to lengthen the pulse width. That is, the slope or rate of change in the control signal, Control, determines the duration or period of time of the sampling aperture (i.e., sampling time period) or the pulse width of a pulse. Since the initiation and extinction of the pulse or aperture are determined independently by two voltage levels, the aperture/pulse duration can be dynamically chosen from a minimum duration, determined by integrated circuit (IC) device constraints, to a duration of arbitrary length. This is useful in signaling systems employing Pulse-Width Modulation (PWM), which allows for spectral manipulation of the resulting aperture/pulse.
The circuit and method of the RACE exhibit good noise rejection on both the input and control signals when the control signal is not near transition levels V2 and V3.
The circuit and method of the RACE enable the user to precisely and independently adjust the starting point and stopping point of each sampler or pulser in a group of such samplers or pulsers in an integrated circuit.
The methods and circuits of the RACE have no extraordinary device requirements (such as a step-recovery diode or capacitors), relying instead, on common design elements, available across a broad range of integrated circuit device technologies, allowing a simple, monolithic, single device-type implementation. The circuit, with minor modifications, can be implemented in many integrated circuit (IC) technologies, including Gallium Arsenide (GaAs) MESFET, GaAs Heterojunction Bipolar Transistor (HBT), GaAs High Electron Mobility Transistor (HEMT), Silicon-Germanium (SiGe), Indium Phosphide (InP), and Silicon bipolar or MOS technology.
The lower power dissipation afforded by the RACE allows a large number of precisely matched, and time-skewed, pulsers or sampling apertures to be integrated onto a single integrated circuit.
The combination of multiple samplers/pulsers allows for direct synthesis and detection of complex pulses.
This ultra-fast correlation capability is important when detecting and recognizing incoming pulses that have complex, distorted, wave shapes, such as, for example in UWB communications systems that may be deliberately band-limited, so as to avoid interfering with aircraft and public service bands, or in a fiber optic receiver in which dispersion and high-frequency attenuation have smeared the impulse response of the system. The RACE will facilitate lowering costs of such correlating receivers for low cost communication systems of the future. The tight time-matching and stability, low power dissipation, high and constant input impedance, and small size and low cost of the sampling heads and pulsers of the RACE will help facilitate a new generation of low cost radar communications transmitters and receivers, time domain reflectometers and transmission test sets, and time domain imaging systems.
The RACE, by virtue of its ability to integrate a large number of precisely matched high-speed sampling cells or pulsers into a single integrated circuit, enables new architectures in signal, processing, amplification, data separation, equalization, mixing and filtering that formerly were not economical or practical to produce. For example, the RACE can be incorporated into a system to provide a communication channel equalizer.
The sampling aperture and pulser architecture of the RACE, by virtue of its scalability to large arrays of matched fast samplers and pulsers on a single integrated circuit, can also enable the use of parallel signal processing, in the analog domain, at higher speeds than was formerly possible.
The RACE can also be used as an element in complex high-speed modulators and demodulators, frequency doublers (owing to the RACE generating output pulses on both the rising and falling edges of a single cycle of the control waveform), and high-speed custom logic elements. The combination of high speed and scalability and the ability to reject imperfections in the sampling control signal enable the RACE to be used as a building block in new integrated circuits capable of parallel processing a large number of rapidly acquired samples, potentially opening up new fields of microwave sampling applications that will allow more complex and more accurate real-time processing of fast signals than was formerly possible.
The RACE has a number of advantages over the prior art. One advantage of the RACE is that fast sampling is provided. Another advantage is that multiple sampling apertures can be precisely placed in time, and matched to each other in duration, due to the RACE's ability to be easily integrated on a monolithic integrated circuit. A further advantage is the RACE's tolerance of aberrations at the beginning and end of the control signal.