Nvidia NVENC

Nvidia NVENC is the name given to Nvidia's ASIC IP block that performs video encoding. It was introduced with the Kepler-based GeForce 600 series in March 2012, as a product feature that offloads H264 video encoding from the host CPU.^[1][2] The video encoder works with the Shadowplay game capture that is included in GeForce Experience and is also supported in OBS (Open Broadcaster Software) and Bandicam.^[3][4]

• https://developer.nvidia.com/nvidia-video-codec-sdk

Versions

NVENC has undergone several hardware revisions since its introduction with the first Kepler GPU (GK104).^[5]

First generation (Kepler)

The first generation of NVENC, which is shared by all Kepler-based GPUs, supports H.264 high-profile (YUV420, I/P/B frames, CAVLC/CABAC), H.264 SVC Temporal Encode VCE, and Display Encode Mode (DEM).

NVidia's documentation states a peak encoder throughput of "8x realtime" at a resolution of 1920x1080 (where the baseline "1x" equals 30fps.) Actual throughput varies on the selected preset and user controlled parameters and settings, and to a lesser degree on the GPU/memory clock frequency. The published 8x rating is achievable with the NVENC preset "high-performance", which sacrifices compression efficiency/quality for encoder throughput. The high-quality preset is considerably slower, but produces fewer compression artifacts.

Second Generation (Maxwell GM107/GM108)

Introduced with the first-generation Maxwell architecture, second generation NVENC adds support for HiP444 profile (YUV4:4:4, predictive lossless encoding), and increases encoder throughput up to "16x realtime" (which corresponds roughly to 1080p @ 480fps with the high-performance preset.)

Third Generation (Maxwell GM20x)

Introduced with the second-generation Maxwell architecture, third generation NVENC implements the video compression algorithm High Efficiency Video Coding (aka. HEVC, H.265) and also increases the H.264 encoder's throughput to cover 4K-resolution @ 60fps (2160p60). However, there is no B-Frame support for HEVC encoding (Only I & P frames). Maximum NVENC HEVC CU size is limited to 32 (HEVC standard allows maximum CU size of 64) and minimum CU size is 8. HEVC encoding also lacks Sample Adaptive Offset (SAO). Consumer-grade GeForce cards are restricted to only two simultaneous encoding jobs at a time, while professional Quadro cards do not have this restriction.

Fourth Generation (Pascal GP10x)

Fourth generation NVENC implements HEVC Main10 10-bit hardware encoding. It also doubles the encoding performance of 4K H.264 & HEVC when compared to previous generation NVENC. It supports HEVC 8K, 4:4:4 chroma subsampling, lossless encoding and sample adaptive offset (SAO). There is no B-Frame support for HEVC encoding and maximum CU size is limited to 32x32.

Operating system support

The Nvidia NVENC SIP core needs to be supported by the device driver. The device driver provides one or multiple interfaces, e.g. OpenMAX IL, to be used by end-user software to access Nvidia NVENC and make use of it. As of November 2014 the Nvidia NVENC SIP core can only be accessed through the "NVENC API". In contrast to VDPAU, which is open-source, the implementation of the NVENC API remains proprietary and is available bundled with Nvidia's proprietary device driver Nvidia GeForce driver.

Nvidia's proprietary device driver Nvidia GeForce driver is available for multiple operating systems and support for Nvidia NVENC has been added to it. Additionally, a free and open-source device driver is available, support for Nvidia NVENC is not documented.^[6]

FFmpeg obtained support to use Nvidia NVENC in 2014.,^[7] and it is officially supported by Nvidia since 375.63 drivers.^[8]

See also

• Intel Quick Sync Video, Intel's equivalent SIP core
• Video Coding Engine, AMD's equivalent SIP core

References