Caltech Cosmic Cube

The Caltech Cosmic Cube was a parallel computer, developed by Charles Seitz and Geoffrey C Fox from 1981 onward.^[1]

It was an early attempt to capitalise on VLSI to speed up scientific calculations at a reasonable cost. Using commodity hardware and an architecture suited to the specific task (QCD), Fox and Seitz demonstrated that this was indeed possible.

In 1984 a group at Intel including Justin Rattner and Cleve Moler developed the Intel iPSC inspired by the Cosmic Cube.^[2] In 1987 several people in the group formed a company called Parasoft to commercialize the message passing interface developed for the Cosmic Cube.^[3]

Characteristics

64 Intel 8086/87 processors^[4]
128kB of memory per processor
6-dimensional hypercube network, i. e. each processor can directly exchange data with six other processors.

References

↑ Cosmic Cubism from Engineering & Science, March 1984 http://calteches.library.caltech.edu/3419/1/Cubism.pdf
↑ Cleve Moler (October 28, 2013). "The Intel Hypercube, part 1". Retrieved November 4, 2013.
↑ History of Supercomputing
↑ Birth of the Hypercube

The Torus Routing Chip
Parallel Computer Archival Documents
John Apostolakis, Clive Baillie, Robert W. Clayton, Hong Ding, Jon Flower, Geoffrey C. Fox, Thomas D. Gottschalk, Bradford H. Hager, Herbert B. Keller, Adam K. Kolawa, Steve W. Otto, Toshiro Tanimoto, Eric F. van de Velde, J. Barhen, J. R. Einstein, and C. C. Jorgensen. 1989. "Supercomputer applications of the hypercube"--In Supercomputing systems: architectures, design, and performance, Svetlana P. Kartashev and Steven I. Kartashev (Eds.). Van Nostrand Reinhold Co., New York, NY, USA:1989 Pages 480-577.

External links

The C Programmer's Abbreviated Guide to Multicomputer Programming

Parallel computing

General	Distributed computing Cloud computing High-performance computing

Levels	Bit Instruction Task Data Memory Loop Pipeline

Multithreading	Temporal Simultaneous Preemptive Cooperative

Theory	PRAM model Analysis of parallel algorithms Amdahl's law Gustafson's law Cost efficiency Karp–Flatt metric Slowdown Speedup

Elements	Process Thread Fiber Instruction window

Coordination	Multiprocessing Memory coherency Cache coherency Cache invalidation Barrier Synchronization Application checkpointing

Programming	Stream Processing Dataflow programming Models Implicit parallelism Explicit parallelism Concurrency Non-blocking algorithm

Hardware	Flynn's taxonomy SISD SIMD MISD MIMD Dataflow architecture Pipelined processor Superscalar processor Vector processor Multiprocessor symmetric asymmetric Memory shared distributed distributed shared UMA NUMA COMA Massively parallel computer Computer cluster Grid computer

APIs	Ateji PX Boost.Thread Charm++ Cilk Coarray Fortran CUDA Dryad C++ AMP Global Arrays MPI OpenMP OpenCL OpenHMPP OpenACC TPL PLINQ PVM POSIX Threads RaftLib UPC TBB

Problems	Embarrassingly parallel Software lockout Scalability Race condition Deadlock Livelock Starvation Deterministic algorithm Parallel slowdown

Category: parallel computing Media related to parallel computing at Wikimedia Commons

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